Review the exact recorded implementation and agreed test scope
Inspect the named release and establish technical fit.
Discuss this scopeEnforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance.
SONJE-P64 PASID / IOMMU / Authority-Version-Lock Access Guard RTL provides the documented memory security rtl responsibility: Enforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance. Evaluate the exact SONJE-P64-IP-004 implementation and confirm its integration contract before using it inside the target design.
Enforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance.
Enforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance.
Documented function grouping, not a wiring diagram, interface contract or physical layout. Confirm the selected release before integration.
Explore related engineering tasks ↗Evidence retained in our records + formal/p64 access proof + P64 evidence
This is a controlled-portfolio summary, not a fresh execution of the chip qualification flow.
Evidence shown is our record for this canonical implementation, not a fresh tool rerun. External foundry acceptance, silicon measurements, standards certification and unlisted interface/physical parameters are not inferred. Exact delivery and rights are agreed before licensing.
Canonical record: P1 / 128-CASE LOCAL MATRIX PASS + SAT GATE OBSERVED PASS
Technical scope, rights, support and release configuration are agreed before delivery.
Inspect the named release and establish technical fit.
Discuss this scopeAgree deployment or design rights, deliverables and support.
Discuss this scopeDefine the customer-specific work and acceptance criteria.
Discuss this scopeChiplet admission, quarantine and trust-boundary engine
Executed digital evidenceChecks requesting domain, read/write permission masks and revocation epoch at the point where memory work is accepted.
Executed digital evidenceTrust/security product
Executed digital evidenceStart with a chip, a software release or a single IP block.
Executed digital verification and/or synthesis are recorded for this implementation; physical qualification is a separate gate.
0e275f8371512b6083f6c87a176b3389f1b2175f34087babeaf290e3d0beb8b0
Evidence ranking for evaluation prioritization; not a probability or certification.