---
title: LY-X130 | Garmo Labs
url: https://garmolabs.com/silicon/ly-x130
description: The extreme-scale LY system architecture joins the full engine set with chiplet/fabric, HBM, collectives and runtime/compiler integration.
---

Extreme-scale LY superprocessor

LY-X130

# Bring the whole model together.

The extreme-scale LY system architecture joins the full engine set with chiplet/fabric, HBM, collectives and runtime/compiler integration.

Get closer to the architecture

Architectural concept. Not a die photograph, floorplan or measured-silicon demonstration.

Full LY Engine-set architecture

HBM + fabric System integration

Runtime Compiler relationship

A CLOSER LOOK

## One architecture.
More ways to see it.

Explore the package study, inspect the detail, or separate the architectural layers. Every view is conceptual.

LY-X130 ARCHITECTURAL STUDY

Product study · Architectural concept. Geometry and component counts are illustrative, not physical specifications.

## Engines. State. A common system.

The extreme-scale LY system architecture joins the full engine set with chiplet/fabric, HBM, collectives and runtime/compiler integration.

Conceptual operation · choose a stage, or play the explanation

Explanatory sequence, not hardware simulation.

The runtime/compiler maps work against the recorded LY engine set.

SEE THE REASON BEHIND THE ARCHITECTURE

### A model spread across execution resources

See the architectural relationship between engines, memory and collectives. HBM and chiplet elements here describe architecture, not proof of a manufactured package.

[Try a related software workflow](https://garmolabs.com/demos/modelnative?product=silicon-ip-078)

The example uses supplied synthetic resources; it is not a simulation or benchmark of LY-X130.

[Continue to GSP ](https://garmolabs.com/gsp/workbench?product=silicon-ip-078)

01

Full LY engine set

02

chiplet/fabric

03

HBM

04

collectives

TECHNICAL OVERVIEW

## The details matter.

[Download the product brief](https://garmolabs.com/static/briefs/silicon-ip-078.pdf)

Canonical identity

IP-078

Responsibility

Extreme-scale LY superprocessor

Documented building blocks

Full LY engine set; chiplet/fabric; HBM; collectives; runtime/compiler; RAS/security.

Delivery boundary

Architecture

Evidence scope

Architecture IP

### Before integration.

Integrate the full LY engine set under its runtime/compiler interface and qualify HBM, chiplet/fabric and collective endpoints individually. Confirm security domains, RAS behavior, package assumptions and external hard-IP dependencies for the selected release.

- Exact SoC/top and configuration
- Clock, reset, power and pad contract
- Memory, PHY and package dependencies
- Release-specific PVT and signoff views

The selected release must confirm:

- Node/library binding
- Clock/reset limits
- Physical and protocol dependencies
- Artifact hashes
- Acceptance criteria

Unpublished values are not inferred from family names or architecture targets.

[Discuss the integration](https://garmolabs.com/contact?products=silicon-ip-078)

Architecture IP

## Know the release.
Know what it establishes.

Architecture and reusable technology are recorded in the controlled catalog. Request the exact release evidence for your intended integration.

This is a controlled-portfolio summary, not a fresh execution of the chip qualification flow.

[Explore the evidence center](https://garmolabs.com/evidence) [Qualification record](https://garmolabs.com/qualification/silicon-ip-078)

### Release-specific qualification

Node-specific physical implementation and system qualification are scoped separately.

Canonical record: Engineering build-spec family

A PATH THAT FITS THE PROJECT

## Build with LY-X130.

Technical scope, rights, support and release configuration are agreed before delivery.

evaluation

### Architecture and release evaluation

Inspect the named release and establish technical fit.

[Discuss this scope](https://garmolabs.com/contact?products=silicon-ip-078&scope=evaluation)

production

### Chip / SoC licensing program

Agree deployment or design rights, deliverables and support.

[Discuss this scope](https://garmolabs.com/contact?products=silicon-ip-078&scope=production)

custom

### Custom silicon integration

Define the customer-specific work and acceptance criteria.

[Discuss this scope](https://garmolabs.com/contact?products=silicon-ip-078&scope=custom)

## Your next big idea.
Let’s build it together.

Start with a chip, a software release or a single IP block.

[Talk to Garmo](https://garmolabs.com/contact) [Start exploring](https://garmolabs.com/developers)