--- title: Garmo-USB3.2-PHY | Garmo Labs url: https://garmolabs.com/ip/garmo-usb3-2-phy description: USB router and PHY-control architecture with a release-specific compliance and analog boundary. --- [Ip](https://garmolabs.com/marketplace) › IP-2094 Interfaces & mixed-signal # Garmo-USB3.2-PHY USB router and PHY-control architecture with a release-specific compliance and analog boundary. Evaluation package [Request evaluation](https://garmolabs.com/contact?products=ip-ip-2094) Gar Interfaces & mixed-signal THE TECHNICAL ROLE ## A clear integration boundary. Garmo-USB3.2-PHY integration role: High-Speed I/O — USB4 v2 / USB 80Gbps router + PHY digital subsystem. Documented composition: PAM3 Gen4 digital PCS and lane bonding; USB3, DisplayPort and PCIe tunneling router with bandwidth arbitration; 80 Gb/s certified-mode target and 120 Gb/s asymmetric display-oriented mode. 01 PAM3 Gen4 digital PCS and lane bonding 02 USB3, DisplayPort and PCIe tunneling router with bandwidth arbitration 03 80 Gb/s certified-mode target and 120 Gb/s asymmetric display-oriented mode TECHNICAL OVERVIEW ## The details matter. [Download the product brief](https://garmolabs.com/static/briefs/ip-ip-2094.pdf) Canonical identity IP-2094 Responsibility High-Speed I/O — USB4 v2 / USB 80Gbps router + PHY digital subsystem Documented interface architecture USB4 Gen4 PHY boundary, protocol adapter ports, PCIe/DP tunnel interfaces, Type-C/PD sideband Documented building blocks PAM3 Gen4 digital PCS and lane bonding; USB3, DisplayPort and PCIe tunneling router with bandwidth arbitration; 80 Gb/s certified-mode target and 120 Gb/s asymmetric display-oriented mode Delivery boundary Evaluation / IP scope Evidence scope Evaluation package Architecture targets · not measurements 20/40/80 Gb/s symmetric; optional 120/40 Gb/s asymmetric mode; backward USB compatibility. ### Before integration. Garmo-USB3.2-PHY integration role: High-Speed I/O — USB4 v2 / USB 80Gbps router + PHY digital subsystem. Documented composition: PAM3 Gen4 digital PCS and lane bonding; USB3, DisplayPort and PCIe tunneling router with bandwidth arbitration; 80 Gb/s certified-mode target and 120 Gb/s asymmetric display-oriented mode. - Interface version and parameter set - Clock/reset domains and integration constraints - Companion memory, PHY and software requirements - Verification collateral and acceptance criteria The selected release must confirm: - Node/library binding - Clock/reset limits - Physical and protocol dependencies - Artifact hashes - Acceptance criteria Unpublished values are not inferred from family names or architecture targets. [Discuss the integration](https://garmolabs.com/contact?products=ip-ip-2094) Evaluation package ## Know the release. Know what it establishes. Canonical technology and its architecture/integration role are recorded. The offered delivery is confirmed against the exact release before licensing. This is a controlled-portfolio summary, not a fresh execution of the chip qualification flow. [Explore the evidence center](https://garmolabs.com/evidence) [Qualification record](https://garmolabs.com/qualification/ip-ip-2094) ### Release-specific qualification Control/model IP does not establish analog PHY, electrical, RF or standards compliance. Qualified third-party or foundry collateral may be required. Canonical record: P2 / REPRESENTATIVE ARCHITECTURE RTL — concrete integration specification and synthesizable RTL shell/representative datapath only; all frequency, throughput, power, area, jitter and standards-superiority figures remain architecture targets until the required evidence hierarchy closes. Electrical/PHY production claims require a characterized foundry/node hard-macro backend plus package/channel and compliance evidence. A PATH THAT FITS THE PROJECT ## Build with Garmo-USB3.2-PHY. Technical scope, rights, support and release configuration are agreed before delivery. evaluation ### Evaluate an individual IP configuration Inspect the named release and establish technical fit. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2094&scope=evaluation) production ### Named-design production license Agree deployment or design rights, deliverables and support. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2094&scope=production) custom ### Node binding or derivative integration Define the customer-specific work and acceptance criteria. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2094&scope=custom) ## Keep exploring. Interfaces & mixed-signal [## GSH-130A](https://garmolabs.com/ip/gsh-130a) Analog socket contract; digital management; calibration firmware path; AMS smoke flow; PEX/LVS/ERC/PVT collateral. Qualified release IP-004 · Controlled physical release Interfaces & mixed-signal [## Garmo-CAN-FD-CTL](https://garmolabs.com/ip/garmo-can-fd-ctl) Automotive CAN controller architecture for message processing, timing and host integration. Evaluation package IP-2086 · Source documented Interfaces & mixed-signal [## Garmo-LIN-CTL](https://garmolabs.com/ip/garmo-lin-ctl) Automotive I/O — 8-channel autonomous LIN controller Evaluation package IP-2090 · Source documented ## Your next big idea. Let’s build it together. Start with a chip, a software release or a single IP block. [Talk to Garmo](https://garmolabs.com/contact) [Start exploring](https://garmolabs.com/developers) CANONICAL EVIDENCE RECORD · IP-2094 ### Source documented A concrete source or implementation record exists; the selected evidence does not establish complete qualification. **Record integrity and qualification boundary**Retained exact-release source reference; no new table locator was inferred. Evidence ranking for evaluation prioritization; not a probability or certification. [How evidence priority is determined ](https://garmolabs.com/marketplace/evidence)