--- title: Garmo-UCIe-D2D | Garmo Labs url: https://garmolabs.com/ip/garmo-ucie-d2d description: Die-to-die controller architecture for chiplet integration; PHY and standards qualification are release-specific. --- [Ip](https://garmolabs.com/marketplace) › IP-2078 Fabric & connectivity # Garmo-UCIe-D2D Die-to-die controller architecture for chiplet integration; PHY and standards qualification are release-specific. Evaluation package [Request evaluation](https://garmolabs.com/contact?products=ip-ip-2078) Gar Fabric & connectivity THE TECHNICAL ROLE ## A clear integration boundary. Garmo-UCIe-D2D integration role: Chiplet I/O — UCIe 3.0 die-to-die controller. Documented composition: UCIe 3.0 48/64 GT/s modes with backward compatibility; Continuous Raw Mode mappings and low-latency streaming; Management Transport Protocol early firmware download. 01 UCIe 3.0 48/64 GT/s modes with backward compatibility 02 Continuous Raw Mode mappings and low-latency streaming 03 Management Transport Protocol early firmware download TECHNICAL OVERVIEW ## The details matter. [Download the product brief](https://garmolabs.com/static/briefs/ip-ip-2078.pdf) Canonical identity IP-2078 Responsibility Chiplet I/O — UCIe 3.0 die-to-die controller Documented interface architecture Raw streaming, PCIe/CXL protocol adapter, die-sideband, D2D PHY boundary Documented building blocks UCIe 3.0 48/64 GT/s modes with backward compatibility; Continuous Raw Mode mappings and low-latency streaming; Management Transport Protocol early firmware download Delivery boundary Evaluation / IP scope Evidence scope Evaluation package Architecture targets · not measurements 16–64 GT/s per lane, Standard/Advanced/3D packages, scalable 16/32/64+ lane modules. ### Before integration. Garmo-UCIe-D2D integration role: Chiplet I/O — UCIe 3.0 die-to-die controller. Documented composition: UCIe 3.0 48/64 GT/s modes with backward compatibility; Continuous Raw Mode mappings and low-latency streaming; Management Transport Protocol early firmware download. - Interface version and parameter set - Clock/reset domains and integration constraints - Companion memory, PHY and software requirements - Verification collateral and acceptance criteria The selected release must confirm: - Node/library binding - Clock/reset limits - Physical and protocol dependencies - Artifact hashes - Acceptance criteria Unpublished values are not inferred from family names or architecture targets. [Discuss the integration](https://garmolabs.com/contact?products=ip-ip-2078) Evaluation package ## Know the release. Know what it establishes. Canonical technology and its architecture/integration role are recorded. The offered delivery is confirmed against the exact release before licensing. This is a controlled-portfolio summary, not a fresh execution of the chip qualification flow. [Explore the evidence center](https://garmolabs.com/evidence) [Qualification record](https://garmolabs.com/qualification/ip-ip-2078) ### Release-specific qualification Control/model IP does not establish analog PHY, electrical, RF or standards compliance. Qualified third-party or foundry collateral may be required. Canonical record: P2 / REPRESENTATIVE ARCHITECTURE RTL — concrete integration specification and synthesizable RTL shell/representative datapath only; all frequency, throughput, power, area, jitter and standards-superiority figures remain architecture targets until the required evidence hierarchy closes. Electrical/PHY production claims require a characterized foundry/node hard-macro backend plus package/channel and compliance evidence. A PATH THAT FITS THE PROJECT ## Build with Garmo-UCIe-D2D. Technical scope, rights, support and release configuration are agreed before delivery. evaluation ### Evaluate an individual IP configuration Inspect the named release and establish technical fit. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2078&scope=evaluation) production ### Named-design production license Agree deployment or design rights, deliverables and support. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2078&scope=production) custom ### Node binding or derivative integration Define the customer-specific work and acceptance criteria. [Discuss this scope](https://garmolabs.com/contact?products=ip-ip-2078&scope=custom) ## Keep exploring. Fabric & connectivity [## GHSI Reliable Link IP v1.0](https://garmolabs.com/ip/ghsi-reliable-link-ip-v1-0) Digital reliability layer implementing CRC32, sequencing, retained retry state, ACK/NACK behavior, deterministic striping and single-spare substitution. RTL + models IP-4281 · Source documented Fabric & connectivity [## Garmo-DMA-Engine](https://garmolabs.com/ip/garmo-dma-engine) Coherent DMA architecture for queued data movement and system integration. Evaluation package IP-2095 · Source documented Fabric & connectivity [## Garmo-Ethernet-TSN](https://garmolabs.com/ip/garmo-ethernet-tsn) Time-sensitive Ethernet control, queueing and scheduling architecture. Evaluation package IP-2087 · Source documented ## Your next big idea. Let’s build it together. Start with a chip, a software release or a single IP block. [Talk to Garmo](https://garmolabs.com/contact) [Start exploring](https://garmolabs.com/developers) CANONICAL EVIDENCE RECORD · IP-2078 ### Source documented A concrete source or implementation record exists; the selected evidence does not establish complete qualification. **Record integrity and qualification boundary**Retained exact-release source reference; no new table locator was inferred. Evidence ranking for evaluation prioritization; not a probability or certification. [How evidence priority is determined ](https://garmolabs.com/marketplace/evidence)