---
title: From intent to inspected result | Garmo Labs
url: https://garmolabs.com/gsp/engineering-story
description: Garmo Labs chips, software and semiconductor IP.
---

GARMO / ENGINEERING EXPERIENCE

# One constraint.
A different machine.

Follow an actual recorded software execution, from intent through placement and model planning to independent checks. Then change the outcome yourself.

[Run the real sample](https://garmolabs.com/gsp/workbench) [Private artifacts ](https://garmolabs.com/full-release/)

RECORDED EXECUTION / SOFTWARE PLANNING

## The same intent.
A traceable formation.

This story uses the actual archived engines and their stored result. It is a software execution—not a fabricated-chip demonstration.

### The input is the contract.

Resource capacity, capability, power and fault-domain constraints define which choices are allowed. The recorded run selected resources b and c before planning model execution.

[Change a constraint](https://garmolabs.com/gsp/workbench) [Open artifact viewer ](https://garmolabs.com/gsp/artifact-viewer)

THE ACTUAL STORED ARTIFACT { "schema": "garmo.website.workflow/1", "name": "Resilient model placement", "requirements": { "caps": 3, "health_min": 70, "count": 2, "max_total_power": 20, "max_latency": 10, "min_failure_domains": 2, "weights": { "diversity": 25 } }, "phases": [{ "name": "prefill", "required_caps": 1, "memory_mb": 4096, "parallelism": 2, "work_units": 3000, "io_gb": 4, "latency_slo_us": 200 }, { "name": "decode", "required_caps": 5, "memory_mb": 2048, "parallelism": 2, "work_units": 1000, "io_gb": 2, "latency_slo_us": 150 } ], "resources": [{ "id": "a", "valid": true, "health": 95, "caps": 7, "score": 90, "latency": 4, "power": 8, "failure_domain": "die0", "memory_mb": 3072, "tops": 100, "bandwidth_gbps": 800, "energy_per_work": 0.005 }, { "id": "b", "valid": true, "health": 88, "caps": 7, "score": 87, "latency": 5, "power": 9, "failure_domain": "die1", "memory_mb": 3072, "tops": 90, "bandwidth_gbps": 700, "energy_per_work": 0.005 }, { "id": "c", "valid": true, "health": 96, "caps": 7, "score": 99, "latency": 3, "power": 9, "failure_domain": "die0", "memory_mb": 3072, "tops": 80, "bandwidth_gbps": 600, "energy_per_work": 0.005 } ] }

### Failure is useful evidence.

Three required failure domains cannot fit this two-domain sample. An oversized working set or insufficient power blocks the result. The workbench records those failures instead of presenting a successful design.

A native chip/layout story can attach its real artifacts through the same workspace when you connect GSP. No synthetic waveform or invented floorplan is substituted for that evidence.